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this is information on a product in full production. march 2012 doc id 018942 rev. 4 1/31 1 vnd5t035ak-e double channel high-side driver with analog current sense for 24 v automotive applications datasheet ? production data features general ? very low standby current ? 3.0 v cmos compatible input ? optimized electromagnetic emission ? very low electromagnetic susceptibility ? compliant with european directive 2002/95/ec ? fault reset standby pin (fr_stby) diagnostic functions ? proportional load current sense ? high current sense precision for wide range currents ? off-state open load detection ? output short to v cc detection ? overload and short to ground latch off ? thermal shutdown latch-off ? very low current sense leakage protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? thermal shutdown ? electrostatic discharge protection application all types of resistive, inductive and capacitive loads description the vnd5t035ak-e is a monolithic device made using stmicroelectronics ? vipower ? technology, intended for driving resistive or inductive loads with one side connected to ground. active v cc pin voltage clamp protects the device against low energy spikes. the device integrates an analog current sense which delivers a current proportional to the load current. fault conditions such as overload, overtemperature or short to v cc are reported via the current sense pin. output current limitation protects the device in overload conditions. the device latches off in case of overload or thermal shutdown. the device is reset by a low level pass on the fault reset standby pin. a permanent low level on the inputs and on the fault reset standby pins disables all outputs and sets the device in standby mode. max transient supply voltage v cc 58 v operating voltage range v cc 8 to 36 v typ on-state resistance (per ch.) r on 35 m current limitation (typ) i lim 42 a off-state supply current i s 2 a 0ower33/ ("1($'5 www.st.com
contents vnd5t035ak-e 2/31 doc id 018942 rev. 4 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 20 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 21 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4 maximum demagnetization energy (v cc = 24 v) . . . . . . . . . . . . . . . . . . . 22 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1 powersso-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.2 powersso-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3 powersso-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
vnd5t035ak-e list of tables doc id 018942 rev. 4 3/31 list of tables table 1. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc = 24 v; tj = 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 9. current sense (8 v < v cc < 36 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 10. openload detection (v fr_stby = 5 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 12. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 13. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 14. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 16. powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 17. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
list of figures vnd5t035ak-e 4/31 doc id 018942 rev. 4 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram powersso-24 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. treset definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. tstby definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. openload off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 8. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. output stuck to vcc detection delay time at frstby activation. . . . . . . . . . . . . . . . . . . . 14 figure 10. delay response time between rising edge of ouput current and rising edge of current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12. device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 13. off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 14. high-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 15. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16. high-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 17. low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 18. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 19. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 20. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. i limh vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 22. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 23. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 24. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 25. maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. powersso-24 pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 27. rthj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . 23 figure 28. powersso-24 thermal impedance junction ambient single pulse (one channel on). . . . . 24 figure 29. thermal fitting model of a double channel hsd in powersso-24 . . . . . . . . . . . . . . . . . . . 24 figure 30. powersso-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 31. powersso-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 32. powersso-24 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
vnd5t035ak-e block diagram and pin description doc id 018942 rev. 4 5/31 1 block diagram and pin description figure 1. block diagram table 1. pin function name function v cc battery connection out 1,2 power outputs gnd ground connection in 1,2 voltage controlled input pins with hysteresis, cmos compatible. they control output switch state cs 1,2 analog current sense pins, they deliver a current proportional to the load current fr_stby in case of latch-off for overtemperature/overcurrent condition, a low pulse on the fr_stby pin is needed to reset the channel. the device enters in standby mode if all inputs and the fr_stby pin are low. control & diagnostic 2 v cc ch1 logic driver current limitation power clamp over temperature undervoltage ch2 overload protection (active power limitation) in1 in2 cs1 cs2 fr_stby gnd out2 out1 signal clamp gapgcft00643 current sense v senseh control & diagnostic 1 off-state open-load v on limitation
block diagram and pin description vnd5t035ak-e 6/31 doc id 018942 rev. 4 figure 2. configuration diagram powersso-24 (top view) table 2. suggested connections for unused and not connected pins connection / pin currentsense n.c. output input fr_stby floating not allowed x (1) 1. x: do not care. xx x to ground through 10 k resistor x not allowed through 10 k resistor through 10 k 6 ## 4! " 6 ## '!0'#&4 #3 ). &2?3tby '.$ ). #3 /54 /54 /54 /54 /54 /54 /54 /54 /54 /54 /54 /54 6 ## .# .# .# .#
vnd5t035ak-e electrical specifications doc id 018942 rev. 4 7/31 2 electrical specifications figure 3. current and voltage conventions note: v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the ratings listed in the ta b l e 3 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to the conditions reported in this section for extended periods may affect device reliability. i s i gnd v cc v cc outn i outn csn i sensen inn i inn gnd fr_stby v fr_stby v inn v sensen v outn v fn i fr_stby table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 58 v -v cc reverse dc supply voltage 0.3 v -i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a -i out reverse dc output current 40 a i in dc input current -1 to 10 ma i fr_stby fault reset standby dc input current -1 to 1.5 ma -i csense dc reverse cs pin current 200 ma v csense current sense maximum voltage v cc - 58 to +v cc v e max maximum switching energy (l = 2.3 mh; v bat =32v; t jstart = 150 c; i out =i liml (typ) ) 250 mj
electrical specifications vnd5t035ak-e 8/31 doc id 018942 rev. 4 2.2 thermal data l smax maximum strain inductance in short circuit condition r l =300m , v bat =32v, t jstart = 150 c, l out =i lmhmax 40 h v esd electrostatic discharge (human body model: r = 1.5 k ; c = 100 pf) ?in 1,2 ?cs 1,2 ?fr_stby ?out 1,2 ?v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit table 4. thermal data symbol parameter value unit r thj-case thermal resistance junction-case (max) (with one channel on) 2 c/w r thj-amb thermal resistance junction-ambient (max) see figure 27 c/w
vnd5t035ak-e electrical specifications doc id 018942 rev. 4 9/31 2.3 electrical characteristics 8v electrical specifications vnd5t035ak-e 10/31 doc id 018942 rev. 4 figure 4. treset definition table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in = 0.9 v 1 a v ih input high level voltage 2.1 v i ih high level input current v in = 2.1 v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in = 1 ma 5.5 7 v i in = -1 ma -0.7 v v fr_stby_l fault_reset_standby low level voltage 0.9 v i fr_stby_l low level fault_reset_standby current v fr_stby = 0.9 v 1 a v fr_stby_h fault_reset_standby high level voltage 2.1 v i fr_stby_h high level fault_reset_standby current v fr_stby = 2.1 v 10 a v fr_stby (hyst) fault_reset_standby hysteresis voltage 0.25 v v fr_stby_cl fault_reset_standby clamp voltage i fr_stby = 15 ma (10 ms) 11 15 v i fr_stby = -1 ma -0.7 v t reset overload latch-off reset time see figure 4 224s t stby standby delay see figure 5 120 1200 s 7buhvhw )5b67%< ,1 287387 &6 2yhuordg &kdqqho *$3*&)7
vnd5t035ak-e electrical specifications doc id 018942 rev. 4 11/31 figure 5. tstby definition table 8. protections and diagnostics symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 24v 30 42 55 a 5v electrical specifications vnd5t035ak-e 12/31 doc id 018942 rev. 4 table 9. current sense (8 v < v cc <36v) symbol parameter test conditions min. typ. max. unit k 1 i out /i sense i out = 1 a; v sense = 2 v; t j = -40c...150c t j = 25c...150c 1952 2080 2960 4150 3840 dk 1 /k 1 (1) 1. parameter guaranteed by design; it is not tested. current sense ratio drift i out = 1 a; v sense = 2 v; t j = -40c to 150c -15 15 % k 2 i out /i sense i out = 3 a; v sense = 4 v; t j = -40c...150c t j = 25c...150c 2490 2585 2930 3440 3265 dk 2 /k 2 (1) current sense ratio drift i out = 3 a; v sense = 4 v; t j = -40c to 150c -10 +10 % k 3 i out /i sense i out = 12 a; v sense = 4 v; t j = -40c...150c t j = 25c...150c 2770 2755 2900 3125 3045 dk 3 /k 3 (1) current sense ratio drift i out = 12 a; v sense = 4 v; t j = -40c to 150c -5 5 % i sense0 analog sense leakage current i out = 0 a; v sense = 0 v; v in = 0 v; t j = -40c...150c 01a i out = 0 a; v sense = 0 v; v in = 5 v; t j = -40c...150c 02a v sense max analog sense output voltage i out = 12 a; r sense =3.9k 5v v senseh analog sense output voltage in fault condition (2) 2. fault condition includes: power limitation, ov ertemperature and open load in off-state condition. v cc =24v; r sense = 3.9 k 7.5 8.5 9.5 v i senseh analog sense output current in fault condition (2) v cc = 24 v; v sense = 5 v 4.9 9 12 ma t dsense2h delay response time from rising edge of input pins v sense <4v; 0.2 a < i out <12a; i sense =90% of i sense max ; (see figure 6 ) 200 400 s t dsen se 2h delay response time between rising edge of output current and rising edge of current sense v sense <4v; i sense = 90 % of i sensemax ; i out =90% of i outmax ; i outmax =3a (see figure 10 ) 250 s t dsense2l delay response time from falling edge of input pins v sense <4v; 0.2 a < i out <12a; i sense =10% of i sense max ; (see figure 6 ) 520s
vnd5t035ak-e electrical specifications doc id 018942 rev. 4 13/31 figure 6. current sense delay characteristics figure 7. openload off-state delay timing note: vfr_stby = high table 10. openload detection (v fr_stby =5v) symbol parameter test conditions min. typ. max. unit v ol openload off-state voltage detection threshold v in =0v; 8v electrical specifications vnd5t035ak-e 14/31 doc id 018942 rev. 4 figure 8. switching characteristics figure 9. output stuck to vcc detection delay time at frstby activation 9 287 g9 287 gw rq w u w i 7 grii ,1387 w w 7 grq g9 287 gw rii *$3*&)7 w :rq w :rii w ')567.b21 )5 67%< 9 &6 9 vhqvh+ ,qsxw /rz *$3*&)7
vnd5t035ak-e electrical specifications doc id 018942 rev. 4 15/31 figure 10. delay response time between rising edge of ouput current and rising edge of current sense figure 11. output voltage drop limitation 9 ,1 , 287 , 2870$; , 2870$; w w w , 6(16(0$; ?w '6(16(+ , 6(16( , 6(16(0$; *$3*&)7 9 21 , 287 7 m ?& 7 m ?& 7 m ?& 9 21 5 21 7 9 && 9 287 $*9
electrical specifications vnd5t035ak-e 16/31 doc id 018942 rev. 4 figure 12. device behavior in overload condition )$8/7b5(6(7 ,1 q 287387 q &6 q 29(5/2$' &+$11(/ q 9 vhqvh+ ryhuordg ryhuordguhvhw ryhuordggldjuhvhw wbuhvhw wbuhvhw *$3*&)7 287387 q dqg&6 q frqwuroohge\,1q )$8/7b5(6(7iurp?wr?:qrdfwlrqrq&6 q slq ryhuordgodwfkrii,qqkljk:&6 q kljk )$8/7b5(6(7orz$1'7hpsfkdqqhoqryhuordgbuhvhw:ryhuord godwfkuhvhwdiwhuwbuhvhw wr)$8/7b5(6(7orz$1',1 q kljk:wkhupdof\folqj&6 q kljk )$8/7b5(6(7kljk:odwfkriiuhvhwglvdeohg wrryhuordghyhqwdqg)$8/7b5(6(7kljk:odwfkriiqrwkh updof\folqj wrryhuordggldjqrvwlfglvdeohghqdeohge\wkhlqsxw ryhuordgodwfkriiuhvhwe\)$8/7b5(6(7 29(5/2$' wkhupdovkxwgrzq25srzhuolplwdwlrq table 11. truth table conditions fault reset standby input output sense standby l l l 0 normal operation x x l h l h 0 nominal overload x x l h l h 0 > nominal overtemperature / short to ground x l h l h h l cycling latched 0 v senseh v senseh undervoltage x x l 0 short to v bat l h x l l h h h h 0 v senseh < nominal open load off-state (with pull-up) l h x l l h h h h 0 v senseh 0 negative output voltage clamp x l negative 0
vnd5t035ak-e electrical specifications doc id 018942 rev. 4 17/31 table 12. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv 1 - 450 v - 600 v 5000 pulses 0.5 s 5 s 1 ms, 50 2a + 37 v + 50 v 5000 pulses 0.2 s 5 s 50 s, 2 3a - 150 v - 200 v 1h 90 ms 100 ms 0.1 s, 50 3b + 150 v + 200 v 1h 90 ms 100 ms 0.1 s, 50 4 - 12 v - 16 v 1 pulse 100 ms, 0.01 5b (1) 1. valid in case of external load dump clamp: 58 v maximum referred to ground. + 123 v + 174 v 1 pulse 350 ms, 1 table 13. electrical transient requirements (part 2) (1) 1. in order to guarantee the iso transient classes a minimum 10k protection resistors are needed on logic pins iso 7637-2: 2004(e) test pulse test level results iii iv 1c c 2a c c 3a c c 3b (2) 2. without capacitor between v cc and gnd. ee 3b (3) 3. with 10 nf between v cc and gnd. cc 4c c 5b (4) 4. external load dump clamp, 58 v maximum, referred to ground. cc table 14. electrical transient requirements (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
electrical specifications vnd5t035ak-e 18/31 doc id 018942 rev. 4 2.4 electrical characteristics curves figure 13. off-state output current figure 14. high-level input current figure 15. input clamp voltage figure 16. high-level input voltage figure 17. low-level input voltage figure 18. input hysteresis voltage 4c; ?#= )l off;?!= 6cc6 6in6out '!0'#&4 4c; ?#= )i h;u!= 6in6 '!0'#&4 4c; ?#= 6icl;6= )inm! '!0'#&4 4c; ?#= 6ih;6= '!0'#&4 4c; ?#= 6il;6= '!0'#&4 4c; ?#= 6ihyst;6= '!0'#&4
vnd5t035ak-e electrical specifications doc id 018942 rev. 4 19/31 figure 19. on-state resistance vs t case figure 20. on-state resistance vs v cc figure 21. i limh vs t case figure 22. turn-on voltage slope figure 23. turn-off voltage slope 4c; ?#= 2on;m/hm= )out! 6cc6 '!0'#&4 6cc;6= 2on;m/hm= 4c # 4c# 4c# 4c# )out! '!0'#&4 4c; ?#= )li m(;!= 6cc6 6cc6 '!0'#&4 4c; ?#= d6outdt /n;6us= 6cc6 2,/hm '!0'#&4 4c; ?#= d6outdt /ff;6us= 6cc6 2,/hm '!0'#&4
application information vnd5t035ak-e 20/31 doc id 018942 rev. 4 3 application information figure 24. application schematic 3.1 gnd protection network against reverse battery 3.1.1 solution 1: resistor in the ground line (r gnd only) this solution can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600 mv / (i s(on)max ). 2. r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggests solution 2 is used (see below). 9 && *1' 287 9 )5b6we\ ,1 5 surw ' og 5 6(16( &6 0&8 & h[w 5 surw 5 surw *$3*&)7 9 *1' ' *1'
vnd5t035ak-e application information doc id 018942 rev. 4 21/31 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd =4.7k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network produces a shift ( 600 mv) in the input threshold and in the status output values, if the microprocessor ground is not common to the device ground. this shift does not vary if more than one hsd shares the same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds to v cc maximum dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso t/r 7637/2 table. 3.3 mcu i/os protection if a ground protection network is used and negative transient is present on the v cc line, the control pins are pulled negative. st suggests that a resistor (r prot ) have to be inserted in line to prevent the microcontroller i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of the microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os. -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = -600 v and i latchup 20 ma; v oh c 4.5 v 30 k r prot 180 k . recommended r prot value is 60 k .
application information vnd5t035ak-e 22/31 doc id 018942 rev. 4 3.4 maximum demagnetization energy (v cc = 24 v) figure 25. maximum turn-off current versus inductance note: values are generated with r l =0 . in case of repetitive pulses, t jstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. )! ,m( '!0'#&4 ! ! " # c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse 'hpdjqhwl]dwlrq 'hpdjqhwl]dwlrq 'hpdjqhwl]dwlrq w 9 ,1 , / *$3*&)7
vnd5t035ak-e package and pcb thermal data doc id 018942 rev. 4 23/31 4 package and pcb thermal data 4.1 powersso-24 thermal data figure 26. powersso-24 pc board 1. layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area = 77 mm x 86 mm, pcb thickness = 1.6 mm, cu thickness = 70 m (front and back side), copper areas: from minimum pad lay-out to 8 cm 2 ). figure 27. r thj-amb vs pcb copper area in open box free air condition (one channel on) . ("1($'5 2 4(j?amb #7 0#"#uheatsinkareacm '!0'#&4
package and pcb thermal data vnd5t035ak-e 24/31 doc id 018942 rev. 4 figure 28. powersso-24 thermal impedanc e junction ambient single pulse (one channel on) figure 29. thermal fitting model of a double channel hsd in powersso-24 1. the fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cyc ling during thermal shutdown) are not triggered : 4( ?#7 4imes ! " # '!0'#&4 a : cu = footprint b : cu = 2 cm 2 c : cu = 8 cm 2 ("1($'5
vnd5t035ak-e package and pcb thermal data doc id 018942 rev. 4 25/31 equation 1: pulse calculation formula where = t p /t table 15. thermal parameters area/island (cm 2 )footprint28 r1 (c/w) 0,5 ? ? r2 (c/w) 0.75 ? ? r3 (c/w) 1 ? ? r4 (c/w) 7.7 ? ? r5 (c/w) 9 9 8 r6 (c/w) 28 17 10 r7 (c/w) 0,5 ? ? r8 (c/w) 0.75 ? ? c1 (w.s/c) 0,005 ? ? c2 (w.s/c) 0,05 ? ? c3 (w.s/c) 0,1 ? ? c4 (w.s/c) 0,5 ? ? c5 (w.s/c) 1 4 9 c6 (w.s/c) 2.2 5 17 c7 (w.s/c) 0,005 ? ? c8 (w.s/c) 0,05 ? ? z th r th z thtp 1 ? () + ? =
package and packing information vnd5t035ak-e 26/31 doc id 018942 rev. 4 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 powersso-24 package information figure 30. powersso-24 package dimensions
vnd5t035ak-e package and packing information doc id 018942 rev. 4 27/31 table 16. powersso-24 mechanical data symbol millimeters min. typ. max. a 2.15 2.47 a2 2.15 2.40 a1 0 0.075 b 0.33 0.51 c 0.23 0.32 d 10.10 10.50 e7.4 7.6 e0.8 e3 8.8 g 0.1 g1 0.06 h10.1 10.5 h 0.4 k5o l 0.55 0.85 n 10o x4.1 4.7 y6.5 7.1
package and packing information vnd5t035ak-e 28/31 doc id 018942 rev. 4 5.3 powersso-24 packing information figure 31. powersso-24 tube shipment (no suffix) figure 32. powersso-24 tape and reel shipment (suffix ?tr?) a c b gapgcft00002 all dimensions are in mm. base q.ty 49 bulk q.ty 1225 tube length ( 0.5) 532 a 3.5 b 13.8 c ( 0.1) 0.6 %dvh4w\ %xo n4w\ $pd[ %plq &? ) * 1plq 7p d[ 5h h o g l p h q vl r q v 7dshglphqvlrqv !ccordingto%lectronic)ndustries!ssociation %)! 3tandardrev!&eb !lldimensionsareinmm 7dsh zlgwk : 7ds h+r o h6s dfl q j 3? &r psrqhqw6sdflq j3 +roh'ldphwhu '? +r oh'ldphwhu 'plq +r oh3rvlwlrq )? &rpsduwphqw'hswk .pd[ +r oh6sdflqj 3? 4o p cover tap e %nd 3ta rt .ocomponents .ocomponents #omponents mmmin mmmin %m ptycomponentspockets saledwithcovertape 5se rdirectionoffeed ("1($'5
vnd5t035ak-e order codes doc id 018942 rev. 4 29/31 6 order codes table 17. device summary package order codes tube tape and reel powersso-24 vnd5t035ak-e VND5T035AKTR-E
revision history vnd5t035ak-e 30/31 doc id 018942 rev. 4 7 revision history table 18. document revision history date revision changes 21-sep-2011 1 initial release. 19-oct-2011 2 updated table 2: suggested connections for unused and not connected pins added note on table 13: electrical transient requirements (part 2) 26-oct-2011 3 changed document status from preliminary data to definitive datasheet 13-mar-2012 4 updated figure 13: off-state output current updated section 3.4: maximum demagnetization energy (v cc = 24 v)
vnd5t035ak-e doc id 018942 rev. 4 31/31 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by two authorized st representatives, st products are not recommended, authorized or warranted for use in military, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2012 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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